Design & Reuse
Catalog of SIP Cores
System on Chip design resources
756 IP
751
0.0
Synopsys Memory, Logic, IO for SMIC 40LL
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...
752
0.0
Synopsys Memory, Logic, IO for SMIC 65LL
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...
753
0.0
Synopsys Memory, Logic, IO for TSMC 40LP
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopys Duet Pa...
754
0.0
Synopsys Memory, Logic, IO for TSMC 65LP
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...
755
0.0
Synopsys Memory, Logic, IO for UMC 40ULP
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...
756
0.0
Synthesizable 3DIO IP for Flexible Physical Implementation
Synopsys 3DIO is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable...